1. The Field of the Invention
The present invention relates to a method and a circuit for an envelope detection by using a peel cone approximation. An envelope detection circuit is a converting circuit applied to applications such as a spread spectrum communication, an amplitude detection for radar systems, and a receiver demodulation and waveform generation, etc., for finding the square root of the sum of the two squares. Primarily, a concept which is different from conventional envelope detection concepts is used in the envelope detection method to achieve effects of both simplifying a circuit configuration and obtaining a low approximation error, which makes approximation to a physical calculated value through a peel cone approximation method.
2. Description of the Related Art
Presently, practical ways to be applied to a known envelope detection circuit are roughly categorized as follows.
1. A method of using coordinate rotation digital computer (CORDIC) is applied to a given envelope detection circuit. Although the CORDIC method achieves a remarkably high precision by using a multi-stage hardware, the configuration of the multi-stage hardware is extremely complicated, for example, the number of transistor gates required for a 16-stage hardware is up to 35000, and the latency for an operation is rather long, for example, a phenomenon of delaying 24 clock pulses occurs in the above situation, which does not meet an economical efficiency requirement. PA1 2. A look-up table is used in a square root of the sum of two squares circuit. Mainly, various corresponding square roots of the sum of two squares in response to different kinds of input conditions are set into a memory. Though the circuit design for this method is the easiest and the most direct one, and has less operation latency, a quite large number of memories is inevitably required in the circuit, and thus it is not the best way to perform the approximation. PA1 3. A half quadrature approximation method is applied to a given envelope detection circuit. Even though this method has an advantage of being a simple hardware structure, it cannot be actually applied since an approximation error is much too big, in which the maximum approximation error is up to 0.35 dB (8%).
Accordingly, not one of the above three methods can comply with the requirements of a simple circuit configuration, less operation latency and a low approximation error. An extraordinary approach is set forth in the present invention to meet all the above requirements plus being achieved at a low cost.